1. Field of the Disclosure
The present disclosure relates generally to a semiconductor memory device. More particularly, the invention relates to a semiconductor memory device capable of reducing current consumed when a sensing operation is performed and thus can reduce power consumption.
2. Description of Related Art
In order to select a single cell from a DRAM and to read data from the cell, a word line and a bit line pair are typically selected. Because the voltage differential in reading the data of the selected cell is low, however, the selected cell is usually sensed. Typically, all the cells coupled to a single word line are sensed due to refresh. Sensing a cell usually involves applying the potential of the power supply voltage to a restore node of a sense amplifier and applying the potential of the ground voltage to a sensing bar node. Due to this, a large amount of current is typically required to sense the cells of a word line, and much power is consumed. Additionally, this may cause variations in the power supply voltage, leading to errors. Further, it is expected that the power consumption in a low power market using a battery will be an important problem.
After the sensing operation is performed, the word line, the restore node, the sensing bar node, and the bit line pair that were activated during the sensing operation are precharged to a bit line precharge voltage level before a next word line is activated. This may cause electric charges stored at the capacitor, which is charged with a HIGH or LOW level, to be unnecessarily discharged.